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Ethernet Switch

New Member
Posts: 1
Registered: ‎12-21-2018

BCM53125S Pseudo-Phy Opcode does not clear

I am currently designing a system where a MCU is communicating to the BM53125 via MDIO and RvMII on the IMP port. I am following the flow chart in Figure 44 of the datasheet and I never see the op code clear from register 17. I've used an oscilloscope and logic analyzer to verify that the data I am reading in on MCU is accurate, so I am little stuck as to what to try next. I am trying to read the Device ID in Page 02h Reg30h (Only need partial value to verify device functionality) and am performing the following sequence:


1 - Write 0x0201 to Register 16

2 - Write 0x3002 to Register 17

3 - Read Reigtse 17[1:0] to confirm opcode cleared

4 - Read Register 24 for Access Register Bits 15:0


In step 3 I always read back 0x3002, the opcode will not clear it seems. CPU_EPROM_SEL is default set high, and I've added a pull-up to this just in case. I retry 10 times and each time I can verify via test equipment that I am receiving 0x3002 as a response. Has anyone encountered this error, or similar, before? Thanks

Posts: 300
Registered: ‎02-15-2016

Re: BCM53125S Pseudo-Phy Opcode does not clear


Per your descriptions, you are doing the pseudo phy read access.

By our datasheet pseudo phy read access flow chart, it may need to implement the SW task/script as following to read.


Read :


w 0x1e 16 0x0201

w 0x1e 17 0x0602 /* op code read */

do  { r 0x1e 17 } while ((read_value & 0x3) != 0)

r 0x1e 24   

r 0x1e 25

r 0x1e 26

r 0x1e 27





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