We want to connect BCM53134O SGMII port with 2500base-X to Phy.
Do we need to supply an external reference clock to the SGMII_REFCLKN/SGMII_REFCLKP pin pair for normal operation?
If yes, which frequency and driving level is required?
Which register entry enables the external reference clock?
Thanks the question.
It does not need external reference clock into SGMII_REFCLKN/SGMII_REFCLKP pins, just need the source 50MHz crystal clock.
Please leave the SGMII_REFCLKN/P pins as floating.
And please make sure to configure SGMII interface as 2500Base-X by following registers write sequence via SPI.
In addition, please be noted the BCM53134 does not support MDC/MDIO Clause45 for external 2.5G PHY registers access. Please use your external CPU to access external 2.5G PHY register if there is 2.5G PHY design on your platform.
[Confiugre SGMII as 2500Base-X registers write]
MDC/MDIO Pseudo PHY Access
Thank you for the information.
We can continue our design and will try the register settings, as soon as the prototype boards are in.