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BCM53134O SGMII interface Reference Clock

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  • 1.  BCM53134O SGMII interface Reference Clock

    Posted 01-15-2019 05:09 AM

    We want to connect BCM53134O SGMII port with 2500base-X to Phy.

    Do we need to supply an external reference clock to the SGMII_REFCLKN/SGMII_REFCLKP pin pair for normal operation?

    If yes, which frequency and driving level is required?

    Which register entry enables the external reference clock?


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  • 2.  Re: BCM53134O SGMII interface Reference Clock

    Posted 01-20-2019 06:27 PM

    Hi,

    Thanks the question.

    It does not need external reference clock into SGMII_REFCLKN/SGMII_REFCLKP pins, just need the source 50MHz crystal clock.

    Please leave the SGMII_REFCLKN/P pins as floating.

    And please make sure to configure SGMII interface as 2500Base-X by following registers write sequence via SPI.

    In addition, please be noted the BCM53134 does not support MDC/MDIO Clause45 for external 2.5G PHY registers access. Please use your external CPU to access external 2.5G PHY register if there is 2.5G PHY design on your platform.

     

    Thanks,

    Ryan

     

    [Confiugre SGMII as 2500Base-X registers write]

    SPI Access

    MDC/MDIO Pseudo PHY Access

    Length

    Byte1

    Byte0

    Page(SPI)

    Offset(SPI)

    MDIO Address

    Offset(MDIO)

    0xe6

    0x00

    0xe6

    0x00

    0x1

     

    0x01

    0x14

    0x3e

    0x04

    0x1f

    0x2

    0x80

    0x00

    0x14

    0x20

    0x04

    0x10

    0x2

    0x0c

    0x2f

    0x14

    0x3e

    0x04

    0x1f

    0x2

    0x83

    0x00

    0x14

    0x20

    0x04

    0x10

    0x2

    0x01

    0x0d

    0x14

    0x30

    0x04

    0x18

    0x2

    0xc0

    0x10

    0x14

    0x3e

    0x04

    0x1f

    0x2

    0x83

    0x40

    0x14

    0x34

    0x04

    0x1a

    0x2

    0x00

    0x01

    0x14

    0x3e

    0x04

    0x1f

    0x2

    0x80

    0x00

    0x14

    0x00

    0x04

    0x00

    0x2

    0x01

    0x40

    0x14

    0x20

    0x04

    0x10

    0x2

    0x2c

    0x2f


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  • 3.  Re: BCM53134O SGMII interface Reference Clock
    Best Answer

    Posted 01-21-2019 01:57 AM

    Thank you for the information.

    We can continue our design and will try the register settings, as soon as the prototype boards are in.

     


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